Micron Confidential and Proprietary
2Gb: x8, x16 NAND Flash Memory
Features
NAND Flash Memory
MT29F2G08ABAEAH4, MT29F2G08ABAEAWP, MT29F2G08ABBEAH4,
MT29F2G08ABBEAHC, MT29F2G16ABAEAWP, MT29F2G16ABBEAH4
MT29F2G16ABBEAHC
Features
• First block (block address 00h) is valid when shipped from factory with ECC. For minimum required
ECC, see Error Management.
• Block 0 requires 1-bit ECC if PROGRAM/ERASE cycles are less than 1000
• RESET (FFh) required as first command after power-on
• Alternate method of device initialization (Nand_Init) after power up (contact factory)
• Internal data move operations supported within the
plane from which data is read
• Quality and reliability
– Data retention: 10 years
– Endurance: 100,000 PROGRAM/ERASE cycles
• Operating voltage range
– VCC: 2.7–3.6V
– VCC: 1.7–1.95V
• Operating temperature
– Commercial: 0°C to +70°C
– Industrial (IT): –40ºC to +85ºC
– Automotive Industrial (AIT): –40°C to +85°C
– Automotive (AT): –40°C to +105°C
– Automotive Certified (AAT): –40°C to +105°C
• Package
– 48-pin TSOP type 1, CPL 2
– 63-ball VFBGA
• Open NAND Flash Interface (ONFI) 1.0-compliant1
• Single-level cell (SLC) technology
• Organization
– Page size x8: 2112 bytes (2048 + 64 bytes)
– Page size x16: 1056 words (1024 + 32 words)
– Block size: 64 pages (128K + 4K bytes)
– Plane size: 2 planes x 1024 blocks per plane
– Device size: 2Gb: 2048 blocks
• Asynchronous I/O performance
– tRC/tWC: 20ns (3.3V), 25ns (1.8V)
• Array performance
– Read page: 25µs 3
– Program page: 200µs (TYP: 1.8V, 3.3V)3
– Erase block: 700µs (TYP)
• Command set: ONFI NAND Flash Protocol
• Advanced command set
– Program page cache mode4
– Read page cache mode 4
– One-time programmable (OTP) mode
– Two-plane commands 4
– Interleaved die (LUN) operations
– Read unique ID
– Block lock (1.8V only)
– Internal data move
• Operation status byte provides software method for
detecting
– Operation completion
– Pass/fail condition
– Write-protect status
• Ready/Busy# (R/B#) signal provides a hardware
method of detecting operation completion
• WP# signal: Write protect entire device
PDF: 09005aef83b83f42
m69a_2gb_ecc_nand.pdf - Rev. S 10/16 EN
Notes:
1
1. The ONFI 1.0 specification is available at
www.onfi.org.
2. CPL = Center parting line.
3. See Electrical Specifications – Program/Erase
Characteristics for tR_ECC and tPROG_ECC
specifications.
4. These commands supported only with ECC
disabled.
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Products and specifications discussed herein are subject to change by Micron without notice.