HCPL-0720, HCPL-7720, HCPL-0721 and HCPL-7721
40 ns Propagation Delay, CMOS Optocoupler
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
Available in either an 8-pin DIP or SO-8 package style
respectively, the HCPL-772X or HCPL-072X optocouplers
utilize the latest CMOS IC technology to achieve outstanding performance with very low power consumption. The HCPL-772X/072X require only two bypass capacitors for complete CMOS compatability.
• +5 V CMOS compatibility
• 20 ns maximum prop. delay skew
• High speed: 25 MBd
• 40 ns max. prop. delay
• 10 kV/µs minimum common mode rejection
• –40 to 85°C temperature range
• Safety and regulatory approvals
UL recognized
– 3750 Vrms for 1 min. per UL 1577
– 5000 Vrms for 1 min. per UL 1577
(for HCPL-772X option 020)
CSA component acceptance notice #5
IEC/EN/DIN EN 60747-5-5
– VIORM = 630 Vpeak for HCPL-772X option 060
– VIORM = 567 Vpeak for HCPL-072X option 060
Basic building blocks of the HCPL-772X/072X are a CMOS
LED driver IC, a high speed LED and a CMOS detector
IC. A CMOS logic input signal controls the LED driver IC
which supplies current to the LED. The detector IC incorporates an integrated photodiode, a high-speed transimpedance amplifier, and a voltage comparator with an
output driver.
Functional Diagram
**VDD1
1
VI
2
*
3
GND1
8
4
VDD2**
7
6
VI, INPUT
H
L
VO
5
IO
NC*
TRUTH TABLE
(POSITIVE LOGIC)
GND2
LED1
SHIELD
Applications
V , OUTPUT
LED1
O
•
fieldbus
OFF Digital H
ON bus, SDS
L
isolation: CC-Link, DeviceNet, Profi-
• AC plasma display panel level shifting
• Multiplexed data transmission
• Computer peripheral interface
• Microprocessor system interface
* Pin 3 is the anode of the internal LED and must be left unconnected
for guaranteed data sheet performance. Pin 7 is not connected
internally.
** A 0.1 µF bypass capacitor must be connected between pins 1 and
4, and 5 and 8.
TRUTH TABLE
POSITIVE LOGIC
VI
LED1
Vo OUTPUT
H
OFF
H
L
ON
L
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
