DS12C887A
Real-Time Clock
www.maxim-ic.com
FEATURES
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PIN ASSIGNMENT
Drop-in replacement for IBM AT computer
clock/calendar
Pin compatible with the MC146818B and
DS1287A
Totally nonvolatile with over 10 years of
operation in the absence of power
Self-contained subsystem includes lithium,
quartz, and support circuitry
Counts seconds, minutes, hours, days, day of
the week, date, month, and year with leapyear compensation valid up to 2100
Binary or BCD representation of time,
calendar, and alarm
12- or 24-hour clock with AM and PM in 12hour mode
Daylight Savings Time option
Selectable between Motorola and Intel bus
timing
Multiplex bus for pin efficiency
Interfaced with software as 128 RAM
locations
– 15 bytes of clock and control registers
– 113 bytes of general purpose RAM
Programmable square-wave output signal
Bus-compatible interrupt signals (IRQ)
Three interrupts are separately softwaremaskable and testable
– Time-of-day alarm once/second to
once/day
– Periodic rates from 122ms to 500ms
– En-of-clock update cycle
Century register
MOT
NC
NC
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
SQW
NC
RCLR
NC
IRQ
RESET
DS
NC
R/W
AS
CS
DS12C887A
24-Pin Encapsulated Package
PIN DESCRIPTION
AD0–AD7 - Multiplexed Address/Data Bus
NC
- No Connect
MOT
- Bus Type Selection
CS
- RTC Chip Select Input
AS
- Address Strobe
- Read/Write Input
R/ W
DS
- Data Strobe
RESET
- Reset Input
IRQ
- Interrupt Request Output
SQW
- Square-Wave Output
VCC
- +5V Main Supply
RCLR
- RAM Clear
GND
- Ground
DESCRIPTION
The DS12C887A real-time clock plus RAM is designed to be a direct upgrade replacement for the
DS12887A in existing IBM-compatible personal computers to add hardware year-2000 compliance. A
century byte was added to memory location 50, 32h, as called out by the PC AT specification. The
DS12C887A is identical in form, fit, and function to the DS1287A, and provides additional 64 bytes of
general-purpose RAM. Access to this additional RAM space is determined by the logic level presented on
AD6 during the address portion of an access cycle. The RCLR pin is used to clear (set to logic 1) all 113
bytes of general purpose RAM but does not affect the RAM associated with the real time clock. In order
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