SN74AVC2T45
DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES531H – DECEMBER 2003 – REVISED APRIL 2006
FEATURES
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DCT OR DCU PACKAGE
(TOP VIEW)
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
Control Inputs VIH/VIL Levels Are Referenced
to VCCA Voltage
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
I/Os Are 4.6-V Tolerant
Ioff Supports Partial-Power-Down Mode
Operation
Max Data Rates
– 500 Mbps (1.8-V to 3.3-V Translation)
– 320 Mbps (<1.8-V to 3.3-V Translation)
– 320 Mbps (Translate to 2.5 V or 1.8 V)
– 280 Mbps (Translate to 1.5 V)
– 240 Mbps (Translate to 1.2 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 8000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
VCCA
A1
A2
GND
1
8
2
7
3
6
4
5
VCCB
B1
B2
DIR
YEP OR YZP PACKAGE
(BOTTOM VIEW)
GND
D1
4 5
D2
DIR
A2
C1
3 6
C2
B2
A1
B1
2 7
B2
B1
VCCA
A1
1 8
A2
VCCB
DESCRIPTION/ORDERING INFORMATION
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track
VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional
translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
ORDERING INFORMATION
PACKAGE (1)
TA
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)
–40°C to 85°C 0.23-mm Large Bump – YZP (Pb-free)
ORDERABLE PART NUMBER
TOP-SIDE MARKING (2)
SN74AVC2T45YEPR
Tape and reel
_ _ _TD_
SN74AVC2T45YZPR
SSOP – DCT
(1)
(2)
Tape and reel
SN74AVC2T45DCTR
DT2_ _ _
VSSOP – DCU
Tape and reel
SN74AVC2T45DCUR
DT2_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2006, Texas Instruments Incorporated
