MC10138
Bi-Quinary Counter
The MC10138 is a four bit counter capable of divide by two, five, or
ten functions. It is composed of four set–reset master–slave flip–flops.
Clock inputs trigger on the positive going edge of the clock pulse.
Set or reset input override the clock, allowing asynchronous “set” or
“clear.” Individual set and common reset inputs are provided, as well
as complementary outputs for the first and fourth bits.
• PD = 370 mW typ/pkg (No Load)
• ftog = 150 MHz typ
• tr, tf = 2.5 ns typ (20%–80%)
http://onsemi.com
MARKING
DIAGRAMS
16
CDIP–16
L SUFFIX
CASE 620
LOGIC DIAGRAM
11
S0
15
Q0
10
S1
13
Q1
6
S2
4
Q2
5
S3
2
Q3
MC10138L
AWLYYWW
1
16
S
12
Clock
S
S
S
Q
Q
D1
Q
D1
D2
Q'
C1
Q'
D2
Q
Q
C1
D1
Q'
D1
PDIP–16
P SUFFIX
CASE 648
C2
Q
C2
Q
C2
R
R
R
1
1
R
PLCC–20
FN SUFFIX
CASE 775
9
Reset
MC10138P
AWLYYWW
Q
Q'
14
Q0
C2
7
3
VCC1 = PIN 1; VCC2 = PIN 16; VEE = PIN 8
Q3
DIP PIN ASSIGNMENT
VCC1
1
16
2
15
3
14
Q0
Q2
4
13
Q1
S3
5
12
C1
S2
6
11
S0
C2
7
10
S1
VEE
8
9
RESET
= Assembly Location
= Wafer Lot
= Year
= Work Week
Q0
Q3
A
WL
YY
WW
VCC2
Q3
10138
AWLYYWW
ORDERING INFORMATION
Device
Package
Shipping
MC10138L
CDIP–16
25 Units / Rail
MC10138P
PDIP–16
25 Units / Rail
MC10138FN
PLCC–20
46 Units / Rail
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10138/D