019V33
CY7C1018V33
CY7C1019V33
128K x 8 Static RAM
Features
pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).
• High speed
— tAA = 10 ns
• CMOS for optimum speed/power
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
Functional Description
The CY7C1018V33/CY7C1019V33 is a high-performance
CMOS static RAM organized as 131,072 words by 8 bits. Easy
memory expansion is provided by an active LOW Chip Enable
(CE), an active LOW Output Enable (OE), and three-state drivers. This device has an automatic power-down feature that
significantly reduces power consumption when deselected.
The CY7C1018V33 is available in a standard 300-mil-wide
SOJ and CY7C1019V33 is available in a standard
400-mil-wide
package.
The
CY7C1018V33
and
CY7C1019V33 are functionally equivalent in all other respects.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
Logic Block Diagram
Pin Configurations
SOJ
Top View
A0
A1
A2
A3
I/O0
INPUT BUFFER
I/O3
CE
I/O0
I/O1
VCC
V SS
I/O4
I/O2
I/O3
I/O1
I/O2
SENSE AMPS
ROW DECODER
A0
A1
A2
A3
A4
A5
A6
A7
A8
512 x 256 x 8
ARRAY
WE
A4
A5
A6
A7
I/O5
CE
COLUMN
DECODER
I/O6
POWER
DOWN
I/O7
WE
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A16
A15
A14
A13
OE
I/O7
I/O6
VSS
VCC
I/O5
I/O4
A12
A11
A10
A9
A8
1019V33–2
1019V33–1
A9
A 10
A 11
A 12
A 13
A 14
A 15
A 16
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Selection Guide
7C1019V33-10
7C1018V33-12
7C1019V33-12
7C1018V33-15
7C1019V33-15
Maximum Access Time (ns)
10
12
15
Maximum Operating Current (mA)
175
160
145
5
5
5
−
0.5
0.5
Maximum Standby Current (mA)
L
Cypress Semiconductor Corporation
Document #: 38-05150 Rev. **
•
3901 North First Street
•
San Jose
•
CA 95134 • 408-943-2600
Revised September 18, 2001
