H
EE
GEN FR
ALO
CAT28F001
Licensed Intel
second source
1 Megabit CMOS Boot Block Flash Memory
LE
A D F R E ETM
FEATURES
I Deep Powerdown Mode
I Fast Read Access Time: 90/120 ns
I On-Chip Address and Data Latches
I Blocked Architecture
I
I
I
I
I
I
I
I
— One 8 KB Boot Block w/ Lock Out
• Top or Bottom Locations
— Two 4 KB Parameter Blocks
— One 112 KB Main Block
Low Power CMOS Operation
12.0V ± 5% Programming and Erase Voltage
Automated Program & Erase Algorithms
High Speed Programming
Commercial, Industrial and Automotive
Temperature Ranges
I
I
I
— 0.05 µA ICC Typical
— 0.8 µA IPP Typical
Hardware Data Protection
Electronic Signature
100,000 Program/Erase Cycles and 10 Year
Data Retention
JEDEC Standard Pinouts:
— 32 pin DIP
— 32 pin PLCC
— 32 pin TSOP
Reset/Deep Power Down Mode
"Green" Package Options Available
DESCRIPTION
The CAT28F001 is a high speed 128K X 8 bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after sale
code updates.
The CAT28F001 is designed with a signature mode
which allows the user to identify the IC manufacturer and
device type. The CAT28F001 is also designed with onChip Address Latches, Data Latches, Programming and
Erase Algorithms.
The CAT28F001 has a blocked architecture with one 8
KB Boot Block, two 4 KB Parameter Blocks and one 112
KB Main Block. The Boot Block section can be at the top
or bottom of the memory map and includes a reprogramming write lock out feature to guarantee data integrity. It
is designed to contain secure code which will bring up
the system minimally and download code to other locations of CAT28F001.
The CAT28F001 is manufactured using Catalyst’s advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, PLCC or TSOP packages.
BLOCK DIAGRAM
I/O0–I/O7
ADDRESS
COUNTER
I/O BUFFERS
WRITE STATE
MACHINE
ERASE VOLTAGE
SWITCH
STATUS
REGISTER
RP
WE
PROGRAM VOLTAGE
SWITCH
CE, OE LOGIC
DATA
LATCH
SENSE
AMP
COMPARATOR
COMMAND
REGISTER
A0–A16
VOLTAGE VERIFY
SWITCH
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ADDRESS LATCH
CE
OE
Y-GATING
Y-DECODER
X-DECODER
1
8K-BYTE BOOT BLOCK
4K-BYTE PARAMETER BLOCK
4K-BYTE PARAMETER BLOCK
112K-BYTE MAIN BLOCK
Doc. No. 1078, Rev. I
