SN74LVC2G86
DUAL 2-INPUT EXCLUSIVE-OR GATE
www.ti.com
SCES360G – AUGUST 2001 – REVISED OCTOBER 2006
FEATURES
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Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 4.7 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Typical VOLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot) >2 V at
VCC = 3.3 V, TA = 25°C
DCT PACKAGE
(TOP VIEW)
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Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DCU PACKAGE
(TOP VIEW)
1A
1
8
VCC
1B
2
7
1Y
2Y
3
6
2B
GND
4
5
1A
1B
2Y
GND
1
2
3
8
7
6
4
5
VCC
1Y
2B
2A
GND
2Y
1B
1A
4 5
2A
2B
1Y
VCC
2A
3 6
2 7
1 8
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G86 performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.
ORDERING INFORMATION
PACKAGE (1)
TA
ORDERABLE PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
–40°C to 85°C
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
SN74LVC2G86YEAR
SN74LVC2G86YZAR
Reel of 3000
VSSOP – DCU
(1)
(2)
_ _ _CH_
SN74LVC2G86YEPR
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
TOP-SIDE MARKING (2)
SN74LVC2G86YZPR
Reel of 3000
SN74LVC2G86DCTR
Reel of 3000
SN74LVC2G86DCUR
Reel of 250
SN74LVC2G86DCUT
C86_ _ _
C86_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2006, Texas Instruments Incorporated