Freescale Semiconductor, Inc.
MOTOROLA
Order this document
by MCM6926A/D
SEMICONDUCTOR TECHNICAL DATA
MCM6926A
Advance Information
128K x 8 Bit Fast Static Random
Access Memory
WJ PACKAGE
400 MIL SOJ
CASE 857A–02
Freescale Semiconductor, Inc...
The MCM6926A is a 1,048,576 bit static random access memory organized
as 131,072 words of 8 bits. Static design eliminates the need for external clocks
or timing strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
This device meets JEDEC standards for functionality and revolutionary pinout,
and is available in a 400 mil plastic small–outline J–leaded package.
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PIN ASSIGNMENT
A
Single 3.3 V Power Supply
Fully Static — No Clock or Timing Strobes Necessary
All Inputs and Outputs Are TTL Compatible
Three State Outputs
Fast Access Times: 8, 10, 12, 15 ns
Center Power and I/O Pins for Reduced Noise
Fully 3.3 V BiCMOS
1
32
A
A
A
27
DQ
7
26
DQ
8
25
VSS
9
24
VDD
10
23
DQ
DQ
11
22
DQ
W
12
21
A
A
13
20
A
A
14
19
A
A
A
6
15
18
A
A
A
G
VSS
MEMORY
MATRIX
512 ROWS x 256 x 8
COLUMNS
ROW
DECODER
A
28
DQ
A
29
5
VDD
A
4
DQ
VDD
VSS
A
E
A
A
30
DQ
A
31
3
A
BLOCK DIAGRAM
2
A
16
17
A
A
A
PIN NAMES
DQ
COLUMN I/O
COLUMN DECODER
INPUT
DATA
CONTROL
DQ
A
A
A
A
A
A
A
A
A . . . . . . . . . . . . . . . . . . . . . . . Address Input
E . . . . . . . . . . . . . . . . . . . . . . . . Chip Enable
W . . . . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . . . . Output Enable
DQ . . . . . . . . . . . . . . . . . . Data Input/Output
VDD . . . . . . . . . . . . . + 3.3 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . . . . Ground
E
W
G
This document contains information on a new product. Motorola reserves the right to change or discontinue this product without notice.
REV 2
8/14/98
© Motorola, Inc. 1998
MOTOROLA FAST SRAM
For More Information On This Product,
Go to: www.freescale.com
MCM6926A
1
