July 1997
FDC6304P
Digital FET, Dual P-Channel
General Description
Features
These P-Channel enhancement mode field effect transistor are
produced using Fairchild's proprietary, high cell density, DMOS
technology. This very high density process is tailored to minimize
on-state resistance at low gate drive conditions. This device is
designed especially for application in battery power applications
such as notebook computers and cellular phones. This device
has excellent on-state resistance even at gate drive voltages as
low as 2.5 volts.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
-25 V, -0.46 A continuous, -1.0 A Peak.
RDS(ON) = 1.5 Ω @ VGS= -2.7 V
RDS(ON) = 1.1 Ω @ VGS = -4.5 V.
Very low level gate drive requirements allowing direct
operation in 3V circuits. VGS(th) < 1.5 V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model.
SO-8
SOIC-16
SOT-223
Mark: .304
4
5
Symbol
2
6
Absolute Maximum Ratings
3
1
TA = 25oC unless other wise noted
Parameter
FDC6304P
Units
VDSS
Drain-Source Voltage
-25
V
VGSS
Gate-Source Voltage
-8
V
ID
Drain Current
-0.46
A
- Continuous
- Pulsed
-1
PD
Maximum Power Dissipation
TJ,TSTG
Operating and Storage Temperature Range
ESD
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
(Note 1a)
(Note 1b)
0.9
W
0.7
-55 to 150
°C
6.0
kV
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
140
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
60
°C/W
© 1997 Fairchild Semiconductor Corporation
FDC6304P Rev.D
Typical Electrical Characteristics
-3.5
-3.0
-1.25
R DS(on), NORMALIZED
I D , DRAIN-SOURCE CURRENT (A)
VGS = -4.5V
DRAIN-SOURCE ON-RESISTANCE
2.5
-1.5
-2.7
-1
-2.5
-0.75
-0.5
-2.0
-0.25
-1.5
0
V GS = -2.0 V
2
-2.5
-3.0
-3.5
-1
-2
-3
-4
-4.5
1
0.5
0
-2.7
1.5
-5
0
0.25
R DS(on) , ON-RESISTANCE (OHM)
R DS(ON) , NORMALIZED
1
5
1.6
DRAIN-SOURCE ON-RESISTANCE
0.75
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
Figure 1. On-Region Characteristics.
I D = -0.25A
V GS = -2.7V
1.4
1.2
1
0.8
0.6
-50
-25
0
25
50
75
100
T J, JUNCTION TEMPERATURE (°C)
125
J
3
2
1
-1
-1.5
-2
-2.5
-3
-3.5
-4
-4.5
-5
Figure 4. On Resistance Variation with
Gate-To- Source Voltage.
0.5
= -55°C
-I , REVERSE DRAIN CURRENT (A)
T
I D = -0.5A
125°C
V GS , GATE TO SOURCE VOLTAGE (V)
-1
V DS = -5V
25°C
4
0
150
Figure 3. On-Resistance Variation
with Temperature.
25°C
-0.75
125°C
-0.5
-0.25
VGS = 0V
0.1
T J = 125°C
25°C
0.01
-55°C
S
I D , DRAIN CURRENT (A)
0.5
-ID , DRAIN CURRENT (A)
V DS, DRAIN-SOURCE VOLTAGE (V)
0
-0.5
-1
-1.5
-2
-2.5
V GS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
-3
0.0001
0
0.2
0.4
0.6
0.8
1
-V SD , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 6. Body Diode Forward Voltage
Variation with Source Current and
Temperature.
FDC6304P Rev.D
