FDC6327C
Dual N & P-Channel 2.5V Specified PowerTrenchTM MOSFET
General Description
Features
These N & P-Channel 2.5V specified MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize on-state resistance and yet maintain low gate
charge for superior switching performance.
•
•
P-Channel -1.6A, -20V.RDS(on) = 0.17Ω @ VGS = -4.5V
These devices have been designed to offer exceptional power
dissipation in a very small footprint for applications where
the bigger more expensive SO-8 and TSSOP-8 packages
are impractical.
•
Fast switching speed.
•
Low gate charge.
•
High performance trench technology for extremely
low RDS(ON).
•
SuperSOTTM-6 package: small footprint (72% smaller
than SO-8); low profile (1mm thick).
Applications
• DC/DC converter
• Load switch
• Motor driving
N-Channel 2.7A, 20V. RDS(on) = 0.08Ω @ VGS = 4.5V
RDS(on) = 0.12Ω @ VGS = 2.5V
RDS(on)= 0.25Ω @ VGS = -2.5V
D2
S1
4
3
5
2
6
1
D1
G2
SuperSOT
TM
S2
-6
G1
Absolute Maximum Ratings
Symbol
TA = 25°C unless otherwise noted
Parameter
N-Channel
P-Channel
Units
VDSS
Drain-Source Voltage
20
-20
V
VGSS
Gate-Source Voltage
Drain Current
±8
-1.9
V
ID
±8
2.7
8
-8
- Continuous
(Note 1a)
- Pulsed
PD
Power Dissipation
(Note 1a)
0.96
(Note 1b)
0.9
(Note 1c)
TJ, Tstg
A
Operating and Storage Junction Temperature Range
W
0.7
-55 to +150
°C
°C/W
°C/W
Thermal Characteristics
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
(Note 1a)
130
Thermal Resistance, Junction-to-Case
(Note 1)
60
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape Width
Quantity
.327
FDC6327C
7”
8mm
3000
©1999 Fairchild Semiconductor Corporation
FDC6327C, Rev. E
FDC6327C
July 2000
Symbol
(continued)
Parameter
Switching Characteristics
td(on)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Type Min
Typ
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
5
7
9
14
12
14
3
3
3.25
2.85
0.65
0.68
0.90
0.65
Max Units
(Note 2)
Turn-On Rise Time
td(off)
Test Conditions
Turn-On Delay Time
tr
TA = 25°C unless otherwise noted
Gate-Drain Charge
N-Channel
VDD = 10 V, ID = 1 A,
VGS = 4.5V, RGEN = 6 Ω
P-Channel
VDD = -10 V, ID = -1 A,
VGS = -4.5 V, RGEN = 6 Ω
N-Channel
VDS = 10 V, ID = 2.7 A, VGS = 4.5V
P-Channel
VDS = -10 V, ID = -1.9 A,VGS = -4.5V
15
14
18
25
22
25
9
9
4.5
4.0
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward VGS = 0 V, IS = 0.8 A (Note 2)
Voltage
VGS = 0 V, IS = - 0.8 A (Note 2)
N-Ch
P-Ch
N-Ch
P-Ch
0.76
-0.79
0.8
-0.8
1.2
-1.2
A
V
Notes:
1: RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user's board design. Both devices are assumed to be operating and sharing the dissipated heat energy
equally.
a) 130 °C/W when
mounted on a 0.125 in2
pad of 2 oz. copper.
b) 140 °C/W when
mounted on a 0.005 in2
pad of 2 oz. copper.
c) 180 °C/W when
mounted on a 0.0015 in2
pad of 2 oz. copper.
Scale 1 : 1 on letter size paper
2: Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
FDC6327C, Rev. E
FDC6327C
Electrical Characteristics
